How is the chip designed

The generation of a chip, including, manufacturing,

Three links. Chip design is at the forefront of chip germination.

The chip design industry needs to work closely with the industry chain back-end wafer manufacturing, packaging and testing links, not only in the design stage need to consider whether the process can achieve the corresponding circuit design, but also need to integrate industry chain resources to ensure the timely supply of chip products, so it is also a test of the ability of enterprises, whether they can complete this series of production. Jinyu Semiconductor can provide customers with one-stop application solutions and on-site technical support services.

The chip contains thousands of PN junctions, capacitors, resistors, wires, etc., so the chip design is a typical technology-intensive industry, which tests the technical ability of engineers, because the design level of engineers largely determines the core factors such as the performance, function, and cost of the chip.

At the beginning of the chip design, it is necessary to clarify the use, specifications and performance of the chip, so that engineers can divide the internal specifications of the chip according to the characteristics of the chip, plan the functional requirements space of each part, establish the method of connecting different units, and determine the overall direction of the design. This part does not seem to have much technical content, but it plays a crucial role in the subsequent design, and the insufficient regional division can not complete the functional realization of the area, which will lead to all the previous work overthrown.

Then, based on the previous specification definition, clearly define the chip architecture, business modules, power supply and other system-level design, such as CPU, GPU, NPU, RAM, connection, interface, etc. Chip design needs to consider the system interaction, function, cost, power consumption, performance, security, maintainability and other comprehensive factors of the chip.

Next, according to the scheme determined by the system design, designers carry out specific circuit design for each module, and use special hardware description language (Verilog or VHDL) to carry out RTL (Register Transfer Level) level code description for specific circuit implementation. After the code is generated, it is necessary to determine whether the logic gate design drawing meets the specification and modify it repeatedly in strict accordance with the established specification standards until the function is correct.

Then, the RTL-level code written in hardware description language is converted into gate level NetList by logic synthesis tool to ensure that the circuit reaches the standard in area, timing and other target parameters. After the completion of logic synthesis, static timing analysis is needed to apply a specific timing model to analyze whether a specific circuit violates the timing restrictions given by the designer. The whole design process is an iterative process, any step can not meet the requirements, need to repeat the previous steps, and even redesign the RTL code.

Finally, the circuit is laid out and wound according to the given size of the silicon wafer area in the NetList, and then the physical layout of the wiring is verified in terms of function and timing. This is also an iterative process. If the verification does not meet the requirements, the previous steps need to be repeated. Finally, the Geometry Data Standard (GDS) layout for chip production is generated.

It is worth noting that many variables need to be considered when designing the chip, such as signal interference, heat distribution, and so on. The physical characteristics of the chip, such as magnetic field and signal interference, are very different under different processes, and can only rely on EDA tools to design step by step, simulate step by step, and constantly choose.

After each simulation, if the effect is not ideal, it is necessary to redesign it, and iteratively verify it through inspection, simulation, prototype platform and other means. It is not a process that is carried out after the design is completed, but a repetitive behavior throughout every link of the design. The purpose is to discover the functional errors of the system hardware and software in advance, further optimize the performance and power consumption, so that the design is accurate, reliable, and in line with the initial planned chip specifications, which is a great test of the wisdom, energy, and patience of the team.